
Si5040
Rev. 1.3 63
Reset settings = 0000 0010
Reset settings = 1010 1010
Register 30. RxtpChkConfig
Bit D7D6D5D4D3 D2 D1 D0
Name
tpSyncMask tpTimeBase[1:0]
Type
RR/WR/W
Bit Name Function
7:3 Reserved Read returns zero.
2 tpSyncMask Test Pattern Checker Sync Mask.
0 = Normal operation.
1 = After synchronization has been achieved a loss of sync will not be reported and the
pattern checker will not be reset.
1:0 tpTimeBase[1:0] Test Pattern Checker Timebase.
The time or number of bits over which the pattern will be checked.
00 = continuous (infinite).
01 = (2
20
– 1024) bits
10 = (2
30
– 1024) bits
11 = (2
40
– 1024) bits
Register 31. RxtpArbGenPtn
BitD7D6D5D4D3D2D1D0
Name RxtpArbGenPtn[7:0]
Type R/W
Bit Name Function
7:0 RxtpArbGenPtn[7:0] Receiver Test Pattern Generator User Defined Pattern.
Note: Bit 0 in Register 31 is the LSB of the 64-bit user-defined pattern, and Bit 7 in Register
38 is the MSB. The transmit sequence is from LSB to MSB.
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