Datacom Systems D56 Spezifikationen Seite 22

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Seitenansicht 21
Si5040
22 Rev. 1.3
Figure 12. CDR and VCO Behaviors Upon Declaring LOS (1 of 2)
Figure 13. CDR and VCO Behaviors Upon Declaring LOS (2 of 2)
LOS=1?
Y
LOLonLOS =0 and
ltrOnLos=0? (Default)
Y
LOLonLOS =1
and ltrOnLos =0?
Y
CDR continuously tries to lock to
incoming data, and the VCO
frequency does not get re-centered
prior to the lock acquisition
process.
Next Figure
Y
VCOCAL[1:0] = 00?
Y
Is refClk
present?
Y
N
The internal VCO pull
range will be automatically
re-centered to the
reference clock frequency
to start the CDR lock
acquisition process.
The entire VCO frequency
range will be swiped to start the
CDR lock acquisition process.
Y
Is refClk
present?
Y
N
Y
VCOCAL[1:0] = 11?
Y
VCO stays at the center of its
frequency range awaiting for
refClk.
LOLonLOS = 0
and ltrOnLos = 1?
Invalid mode!
LOL will stay on.
VCOCAL[1:0] = 01?
LOLonLOS = 1
and ltrOnLos = 1?
VCOCAL[1:0] = 10
(Default)?
VCOCAL[1:0] = X1?
Y
VCOCAL[1:0] = X0?
Y
Is refClk
present?
Y
N
The internal VCO pull range
will be automatically re-
centered to the reference
clock frequency to start the
CDR lock acquisition
process. Note that LOL will
not be cleared.
LOLonLOS =1 and
ltrOnLos =1?
Y
From Previous Figure
LOLonLOS = 0 and
ltrOnLos = 1?
Y
Ltr (bit 1 in Register 7)= 1?
Y
Since ltr has been set to 1
prior to the assertion of
LOS, CMU maintains lock
to the reference and the
CDR lock acquisition
depends on CDRLTDATA
control in Register 7.
N
Is refClk
present?
Y
N
CMU locks to the
reference clock until
LOS is clear. Note that
LOL will be off during
this period.
VCO stays at the
center of its
frequency range
awaiting for refClk.
VCO stays at the center of
its frequency range awaiting
for refClk.
Invalid mode!
ltrOnLOS is enabled
but refClk is disabled.
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